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Discussions about Xyce, the SPICE simulator from Sandia National Lab.
Community announcements about projects, products or services related to FOSSi.
The Universalization of IC Design from CASS (UNIC-CASS) program. Docker image: https://github.com/unic-cass/uniccass-icdesign-tools
Discussions about the ReRAM in general, the process option for SkyWater sky130: circuits, device characteristics, simulation, testing, etc.
Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys
All about design verification.
Unofficial room for the Free Silicon Conference https://wiki.f-si.org/ https://peertube.f-si.org/
IEEE SSCS Code-a-Chip Travel Grant Award https://github.com/sscs-ose/sscs-ose-code-a-chip.github.io
Project showcases (AI-generated/AI-aided)
System-level design for open source silicon projects
https://wafer.space/ - Low cost silicon manufacturing for GF180MCU.
Channel for discussions related to the open source track of the European Chip Design Platform. More information about EuroCDP: https://eurocdp.eu/ https://www.linkedin.com/company/eurocdp/
Ciel is a version manager (and builder) for builds of open-source process design kits (PDKs). https://github.com/fossi-foundation/ciel
M1_AC3E-Chile.gds M6_LowNoiseAnomaly.gds M11_RF_MOSbius.gds M15_XDAC.gds
Chipathon 2025 MOSbius Switch Matrix https://github.com/mosbiuschip/switch_matrix_gf180mcu_9t5v0
Discuss Vaporview usage, bugs, roadmap, API, and contribution.
M2_ChipOdyssey_FullTopLevel.gds M3_CreActive.gds M10_RAZAVUS.gds M13_SpikCore.gds M17_OnChip.gds
Discuss open source PeakRDL & SystemRDL tools https://peakrdl.org https://github.com/SystemRDL
Coreforge Foundation and community channel (Coreblocks, Transactron) | https://kuznia-rdzeni.org | contrib@ml.kuznia-rdzeni.org - open list | FOSS computing hardware | Bridged to IRC #coreforge at libera.chat
Heterogeneous integration, 3D PDK stack, ReRAM, TFT, FEFET